Customer has an ASIC based on a very popular microcontroller core at the heart of their products. Over the period of time the feature creep has used up all of the code space in spite of in house efforts of optimization. The possibility of having to modify the ASIC loomed over the R&D dept.
A project was taken up for optimizing the existing code to make code space available. A comprehensive study of the existing features was made and both the functional and the performance features were analysed. Various techniques of code size optimization were employed, including re-architecture, mixed C-and assembly programming and algorithm modification. The code was re-architected using a layered approach and modular design for fitting the hardware abstraction, data processing and application layers. Each of these layers, including the data processing algorithms were optimized for code space. Assembly code was used at appropriate modules to reduce code space. A detailed list of test cases at unit and system level were prepared and testing was conducted to ensure the product functionality with respect to previous version.
About 20% of the code space was recovered. Customer was able to postpone the expenditure of few hundred thousand dollars of the ASIC redesign by few years.